UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs

UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs

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This book describes a specification, microarchitecture, VHDL implementation and evaluation of a SPARC v8 CPU with fine-grain multi-threading, called micro-threading. The CPU, named UTLEON3, is an alternative platform for exploring CPU multi-threading that is compatible with the industry-standard GRLIB package. The processor microarchitecture was designed to map in an efficient way the data-flow scheme on a classical von Neumann pipelined processing used in common processors, while retaining full binary compatibility with existing legacy programs.The DMA engine internal structure is depicted in Fig.8.14. It has three main interfaces: a€c BX-Master is connected to the BRAM XBAR Master port 0. Through this port the data is transferred to and from the local memories. a€c AHB-Master is ananbsp;...

Title:UTLEON3: Exploring Fine-Grain Multi-Threading in FPGAs
Author: Martin Daněk, Leoš Kafka, Lukáš Kohout, Jaroslav Sýkora, Roman Bartosiński
Publisher:Springer Science & Business Media - 2012-10-20

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